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At Synopsys, you will contribute to the development of non-volatile memory IP deployed across a broad spectrum of process technologies from advanced 2nm nodes to mature 180nm processes.
Responsibilities
- Design and develop analog circuit blocks for non-volatile memory IP, including charge pumps, high-voltage switches, sense amplifiers, bandgap references, bias generators, low-dropout regulators, and oscillators
- Conduct comprehensive pre-layout and post-layout simulation campaigns across process, voltage, and temperature corners, including Monte Carlo analysis, aging effects, and electromigration and IR-drop verification
- Support IP-level integration activities, addressing analog-digital interface requirements, power domain architecture, multi-supply coordination, and technology node portability across the 2nm to 180nm range
- Collaborate with physical design teams to execute design rule checking, layout versus schematic verification, parasitic extraction, and mixed-signal co-simulation
- Contribute to reliability analysis and qualification programs, including gate-oxide stress evaluation, hot carrier injection assessment, bias temperature instability characterization, electrostatic discharge protection, latch-up prevention, high-temperature operating life testing, data retention validation, and…
- Prepare comprehensive IP documentation and deliverables, including technical datasheets, behavioral models in Verilog and Liberty formats, physical views in LEF and GDS formats, and customer integration guidelines
- The Impact You Will Have
- Your circuit implementations will directly influence the yield, data retention characteristics, endurance performance, access speed, power consumption, and silicon area efficiency of non-volatile memory IP deployed across multiple foundry partnerships
- You will contribute to improved correlation between pre-silicon simulation and post-silicon measurement, reducing qualification cycle time and minimizing the risk of design iterations
- Your attention to circuit robustness under high-voltage stress and low-voltage operating conditions will enable deployment in automotive, industrial, and consumer applications with stringent reliability requirements
Languages
- Work format
- On-site
- Seniority
- Senior
- Posted
- 5 Nov 2026
- Last verified
- In the last 3 days
Required
- You communicate technical concepts effectively across disciplines, articulating analog design constraints and requirements to digital designers, layout engineers, and product management stakeholders
- You maintain organized project management practices, tracking multiple design blocks at various stages of maturity while meeting established milestones and deliverable commitments
Nice to have
- You possess strong analytical capabilities that enable you to diagnose simulation failures efficiently, distinguishing between layout-induced issues, device model limitations, and fundamental circuit design concerns
- You demonstrate effective collaboration across geographically distributed teams, conveying technical information clearly through both written documentation and verbal presentation

Synopsys
Electronic design automation and semiconductor IP company.
- Electronic design automation and semiconductor IP
- Founded in 1986
- Sunnyvale, California, USA
- 5000+ employees
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