DDR I/O Analog and Mixed-Signal Design Intern

Responsibilities

• Assist with transistor-level design and simulation of DDR I/O circuits.
• Analyze timing, power, signal integrity, and PVT variations.
• Contribute to the design and functional verification of TX, RX, clocking, calibration, and power-delivery circuits.
• Develop simulation testbenches and automate result analysis.
• Debug schematic, layout, and post-layout simulation results.
• Document technical findings and present results to the design team.
• Gain hands-on experience with production DDR/LPDDR PHY development and advanced semiconductor design methodologies.
• The Impact You Will Have
• Contribute to the development and characterization of high-performance DDR/LPDDR PHY circuits.
• Support analysis and verification activities that help ensure circuit performance across different operating conditions.

Languages

Required

• Scripting experience with Python, Perl, Tcl, or Shell.

Nice to have

• Strong analytical, debugging, and communication skills.
• Familiarity with signal integrity, clocking circuits, statistical analysis, or post-layout verification is a plus.
• Good written and spoken English skills, including the ability to read and write technical documentation

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