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Senior Full Chip Layout Engineer

NVIDIA

Israel, Yokneam +1 more · On-site · relocationSalary not disclosedfull-timeNVIDIA Careers (offices abroad)
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NVIDIA is looking for best-in-class Physical Design Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.

Responsibilities

  • Perform physical layout for full-chip level, integration, pinning and bump route
  • Work with block owners and project managers to assure high quality convergence in all layout aspects
  • You will be responsible for chip layout from the floorplanning stage through tape-out
  • What we need to see
  • An Electronics Engineer certificate or a B.Sc. in Electrical Engineering
  • You should have 5 years of hands-on Full-chip layout and Physical Verification experience, demonstrating your proven expertise.
  • A strong background in Physical Verification methodologies, including DRC, LVS, ANT, ERC, and DFM for advanced process nodes, is required
  • Knowledge in scripts' language: TCL, Unix and Shell
  • Experience in Linux environments
  • AI tools orientation or alternatively a desire to learn

Languages

    Work format
    On-site
    Seniority
    Senior
    Posted
    18 Sept 2026
    Last verified
    In the last 5 days

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