Senior Performance Modeling Architect, CPU Fabric and LLC

Responsibilities

• As a core member of the architecture team, your daily work will involve
• Developing and maintaining high-fidelity, cycle-accurate performance models (C++/SystemC) for coherent interconnects and large-scale shared caches.
• Modeling and analyzing performance bottlenecks across varying scales, from small-cluster automotive SoCs to massive, multi-mesh data center architectures.
• Evaluating the performance impact of different coherency protocols (e.g., CHI, ACE, or proprietary) and snooping filters.
• Running and analyzing industry-standard benchmarks (SPEC, MLPerf, Automotive-specific suites) to drive architectural trade-offs.
• Collaborating with build and verification teams to correlate performance models with silicon and working with software teams to optimize drivers for the underlying hardware topology.
• What we need to see
• To be successful in this role, you should possess a deep technical foundation in computer architecture
• A Master’s or Ph.D. in Computer Engineering, Electrical Engineering, or Computer Science (or equivalent experience) with a focus on architecture with 5+ years of experience.
• Strong understanding of CPU microarchitecture, memory consistency models, and cache coherency protocols.

Languages