ASIC Design Engineer

Responsibilities

• Drafting microarchitecture documents and implementing high-performance, and area and power-efficient RTL to meet strictly defined development targets and specifications.
• Analyzing architectural trade-offs based on features, performance requirements, and area/power constraints.
• Crafting micro-architecture, implementing them in RTL, and delivering fully verified, synthesis/timing clean builds.
• Collaborating closely with architects, other designers, and pre and post silicon verification teams to deliver world-class RTL builds.
• Working on a diverse list of IPs, including GPU's time distribution system, engine scheduler, interrupt controllers, and copy engines.
• Assisting the silicon bring-up team in debugging and post-silicon validation activities.
• What we need to see
• BS/MS Degree or equivalent experience in Electrical Engineering, Computer Engineering, or Computer Science.
• 2+ years of relevant RTL design work experience.
• Strong in micro-architecture and RTL development (Verilog), as well as entire front-end flows including logic synthesis, power, and timing analysis.

Languages