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Senior ASIC Verification Engineer - PMU

NVIDIA

China, Shanghai · On-site · relocationSalary not disclosedfull-timeNVIDIA Careers (offices abroad)

As chip sizes continue to grow, power efficiency has become critical across all NVIDIA products - from data centers to automotive and personal computing. Our PMU IP, developed over the past 17 years, is crucial in optimizing chip performance and efficiency in both idle and active scenarios.

Responsibilities

  • Collaborate with the production SW team and power arch team to define the architecture/micro-architecture for various power features.
  • Learn how PMU's function impacts the system and support the silicon debug.
  • Implement the micro-architecture to RTL design.
  • What we need to see
  • BS / MS in electrical / computer engineering.
  • 3+ years working experience, with preference given to those with MS or equivalent experience.
  • Strong communication skills and proficient oral English since this role require frequent communication with external teams mainly in USA and India.
  • Familiar with frontend ASIC design.
  • Ways to stand out from the crowd
  • Experience on active power/low power design.

Languages

    Work format
    On-site
    Seniority
    Senior
    Posted
    31 Jul 2026
    Last verified
    In the last 5 days

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