Applied Research Engineer, Chip Design

Responsibilities

• Apply LLMs, coding agents, and agentic systems - to core ASIC design problems: RTL generation
• Design and Formal verification, PPA prediction and optimization.
• Hands-on experience with LLMs, RL, RLHF/RLAIF, post-training, evaluation, graders, synthetic data, model training, coding agents, tool-using agents, and production ML systems
• Deliver against NVIDIA's internal chip design schedules and activities - your success is measured by how much faster the ASIC teams move, not by research output alone.
• Build robust data generation (including synthetic data) and meticulous evaluation methodology that separates working systems from demos and use evaluation to decide what to automate next.
• Wire coding agents and agentic AI into EDA and validation flows — simulation, regressions, waveform and log analysis, script generation — so engineers can drive complex tasks and cut ramp time.
• Push the limits of what's possible in chip design with models and research harnesses on top of open-source foundations and iterating fast from prototype to production.
• Partner closely with NVIDIA's internal Nemotron team to improve our models with domain-specific data, feedback, and post-training, feeding ASIC-design expertise back into the models.
• What we need to see
• MS or PhD or equivalent experience in Computer Science, Electrical/Computer Engineering, or related field.

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