Principal Solutions Architect - Semiconductor Test

Responsibilities

• Define the comprehensive test development strategy across wafer-level (probe/ATE) and package/final/qual test for new and existing product families.
• Lead architectural trade-off decisions on test coverage, test time, cost of test, and quality escapes across the full test flow.
• Establish architectural guidelines for the test program, Test Methods/Class structure, modularity, and reuse across ATE platforms (Advantest, Teradyne, etc.).
• Serve as the senior liaison between build and test engineering for DFT architecture decisions — scan, BIST, JTAG, boundary scan, and embedded compression.
• Influence SoC and IP build reviews to ensure testability, observability, and debug-ability
• Drive adoption of AI/ML techniques for yield learning, outlier detection, predictive binning, and test time optimization.
• Define and maintain test roadmaps aligned to device technology roadmaps and manufacturing scale targets.
• Mentor senior and principal test engineers; cultivate technical standards and guidelines across the test organisation.
• Engage with ATE vendors, test IP providers, and industry consortia (SEMI, JEDEC, IEEE) on emerging standards and technology directions.
• What we need to see

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