Senior Silicon Power, Thermal Validation and Methodology Engineer

Responsibilities

• Lead the effort across multi-functional teams to keep the program’s power and thermal productization strategy clear, executable, and on track.
• Create methodology and silicon test plan based controller designs and architecture, including characterization process, debug tools, fuse/firmware settings and lab requirements.
• Drive resolution for challenging silicon issues through structured hypotheses, measurement plans, and root-cause closure.
• Steward the Power and Thermal playbook when the existing productization methodology does not fit the problem, creating new mitigations and assembling them as reusable methods.
• Build AI-enabled workflows to automate data analysis, metric extraction, trend checks, and report generation across multiple bringups to improve, leverage, and shorten time to market.
• Serve as a key technical owner for multi-functional decisions, issues, and tradeoffs related to feature bring-up.
• What we need to see
• BS or MS in Electrical Engineering, Computer Engineering, or a related field, or equivalent experience.
• 8+ years of proven track record in post-silicon bring-up and validation of power and thermal features on sophisticated ASIC or SoC programs.
• Strong end-to-end understanding of silicon behavior across architecture, firmware, validation, and platform interactions, with expertise in power and thermal domains.

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