Senior Silicon Circuit Co-Design Engineer

Responsibilities

• Own the co-design, bring-up, and post-silicon validation of the analog, digital, and mixed-signal circuits that underpin NVIDIA's safety, security, reliability, and performance enhancement features — across the full PVT space, from first power-on through production sign-off.
• Close the simulation-to-silicon gap.
• Build methodologies that correlate measured circuit behavior against pre-silicon predictions, quantify where the model diverges from reality, and produce analysis that design and architecture teams can act on with confidence.
• Trace failures to their source — a circuit marginality, a power integrity interaction, a process corner the model didn't anticipate, or a system-level coupling — and drive the resolution all the way through to confirmation.
• Own and build AI agents that work at your direction: automated test orchestration, intelligent data pipelines, and analysis flows that expand coverage and compress cycle time without sacrificing rigor. Know where AI accelerates real work and where it introduces risk.
• Build the tools your work depends on.
• Design and own automation and analysis infrastructure that lets you execute efficiently across multiple products simultaneously without sacrificing depth or coverage.
• Sit at the decision table. Your data drives binning strategy, guard-band decisions, reliability sign-off, and design improvements for future programs. When the data is ambiguous, your analysis is what resolves it.
• Lead and mentor junior engineers and interns. Raise the technical floor of the team around you.
• What we need to see

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