Senior Custom SOC IP Verification Engineer

Responsibilities

• Lead ASIC design verification for various processing blocks in a SOC, including planning, execution, Coverage and methodology development.
• Collaborate with multiple teams (Architecture, SW/FW
• Design, Modeling, Emulation, Post-Silicon Validation) to ensure comprehensive verification plans.
• Support engineering teams in delivering solutions for purpose-built ASICs and collaborate with IP development teams for IP identification, selection, and licensing.
• Analyze SOC and IP architecture, develop verification plans, and establish performance metrics.
• Work with partners in a co-development environment during development, debug, and bringup.
• Plan tests, achieve coverage closure, and enable customer TB infrastructure.
• Validate use cases for power-on and boot requirements.
• What We Need To See
• Proficient in design verification tools like Synopsys VCS, Cadence Xcelium Simulator, Verdi, JasperGold, and VC Formal.

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