Senior Manager, DPU Performance and System Validation

Responsibilities

• Lead and manage a group of 25+ engineers, coordinating two key teams: Performance in DV and Simulation Model, and System Validation.
• Collaborate with the ARCH team to define and implement the Performance Verification (PV)
• Plan, ensuring comprehensive test coverage and platform integration.
• Coordinate the performance emulation and functional validation processes, ensuring seamless readiness for TapeOut from a performance perspective.
• Participate in post-silicon performance debugging, contributing to the flawless execution of performance improvements.
• Develop and unify performance debug processes across all platforms, ensuring consistency and efficiency.
• What we need to see
• Proven experience in performance management within the chip build industry.
• Outstanding leadership skills with the ability to manage and encourage a diverse team of engineers.
• Solid technical expertise in DPU performance and system validation, accompanied by a history of effective implementation, or equivalent experience.

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