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Layout Design Manager
Synopsys
Armenia · On-siteSalary not disclosedfull-timeNewVerified recentlySynopsys Careers
You have progressed from individual contributor to technical leader, establishing methodologies that ensure consistency and quality across complex projects. When your team encounters challenges with EMIR analysis or LVS verification, you provide the technical guidance necessary to resolve issues while developing their problem-solving capabilities.
Responsibilities
- Lead and manage a layout engineering team delivering custom analog/mixed-signal IC layout for PCIe Gen7/Gen8, UCIe, SerDes, PLLs, PHYs, and power management IP
- Direct layout execution from initial floorplanning through tapeout, including resource planning, schedule management, and risk mitigation across concurrent development programs
- Establish and implement advanced layout methodologies, automation frameworks, and AI-assisted design tools to enhance quality and efficiency
- Collaborate with analog design, digital implementation, verification, CAD, and product engineering organizations to resolve technical challenges and ensure alignment with project objectives
- Define and enforce layout standards for DRC, LVS, EMIR, reliability, ESD, and manufacturing compliance across advanced CMOS process technologies
- Build organizational capability through recruiting, mentoring, and developing layout engineers and technical leads
- The Impact You Will Have
- Your team will deliver the physical implementation for industry-leading high-speed connectivity IP deployed in data center, AI infrastructure, and networking applications globally
- The methodologies and quality standards you establish will improve first-pass silicon success rates and reduce development cycle times across multiple product portfolios
- Your investment in team development will build technical depth and leadership capability within the organization
Languages
- Work format
- On-site
- Seniority
- Lead
- Posted
- 30 Sept 2026 (3 days ago)
- Last verified
- 3 Oct 2026