ASIC Design Engineer, Clocks

Responsibilities

• As a Clocks team member, you will collaborate with other architects, ASIC designers and verification engineers to design high frequency and low power clocks. You should be able to engage with multiple teams and design the GPU clocks to satisfy all the architectural constraints. You will need to run and enhance some…
• Collaborate with software and silicon solution team to debug GPU clock silicon bugs in our new products.
• What we need to see
• BS or (MS preferred) in EE or equivalent experience. 2+ years of meaningful work experience.
• Your ability to thrive in a dynamically changing environment.
• Validated experience in RTL design (Verilog), verification and logic synthesis. Your strong coding skills in Perl or Python or other industry-standard scripting languages.
• Deep understanding of sub-micron silicon issues like noise, cross-talk, and OCV effects is a plus. Good understanding of backend flows and requirements is a plus.
• DFT knowledge is a plus. Experience in implementing on-chip clocking networks is desirable.
• Excellent analytical and problem-solving skills. Fluent English (both written and spoken) and excellent communication skills.
• Good team work spirit, easy to cooperate with team members.

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