Senior System Verification Engineer

Responsibilities

• We support multiple emulation environments using the latest emulation techniques (C/C++ DPI Transactors, SV assertions, Coverage, Power Estimation, SpeedBridges, Accelerated UVM Testbenches).
• We have continual collaboration with Design, DV, Power, Silicon Validation, Performance, and Software teams.
• Work constructively leading emulation vendors to debug issues using various tools.
• Be familiar with hierarchical design approach, top-down design, SoC and system level verification.

Languages