RTL Verification Engineer

Responsibilities

• Lead top-level functional verification for our next-generation AI compute chiplet, ensuring complete protocol compliance and robust multi-die integration.
• Architect, deploy, and maintain advanced UVM/SystemVerilog testbenches, assertions, and constrained-random test plans for memory and compute subsystems.
• Drive coverage-driven verification, target debug, and root-cause analysis across complex hardware-software boundary scenarios.
• Collaborate closely with Front-End RTL
• Design, System Architecture, and Software/Compiler teams to achieve full tape-out readiness and post-silicon validation.
• Benchmark and analyze system-level performance to demonstrate the throughput, bandwidth, and energy efficiency of Vertical Compute's VIMTM technology.
• About the team
• This role is part of the Hardware
• Design team within Vertical Compute's Product & System organization, reporting directly to the HW Team Manager. You will work in close collaboration with the Front-End
• Design and Software teams, partnering across cross-functional engineering groups to ensure the seamless functionality, performance, and successful delivery of our vertical compute products.

Languages