SoC Power Architect

Responsibilities

• Develop architectures, algorithms, models, and methodologies to improve power consumption of our DPU and NIC products across all design life cycles.
• Lead research into innovative power optimization techniques and power modeling approaches that will drive our solutions to the next level.
• Define power-aware architecture requirements and implementation strategies for next-generation products, balancing power, performance, area, and design execution considerations.
• Work closely with board, package, and physical design teams to understand and mitigate design limitations: power delivery, di/dt, thermal, and signal integrity.
• Collaborate across software, ASIC design, verification, and platform teams to drive power improvements end-to-end.
• What we need to see
• Bachelor’s or Master’s degree in Electrical Engineering or a related field from a known university.
• At least 5 years of experience in ASIC design/uarch/arch/performance.
• Strong EE fundamentals including knowledge of digital design, front-end and back-end practices, power analysis, and characterization.
• Exceptional analytical skills with a passion for solving complex logical and system-level problems.

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