Senior Package Layout Engineer - Hardware

Responsibilities

• As part of a Layout team, you will collaborate to implement high speed/density ASIC packages.
• Perform substrate breakout patterns for ASIC packages.
• Optimize package pinout incorporating system level trade-offs of pins assignment.
• Help perform package routing, placement, stack-up, reference plane and power distribution using Cadence APD or SiP tool suite.
• Propose layout design trade-offs to the Technical Package
• Lead for resolution and implementation.
• Conduct design feasibility studies to evaluate the Package design goals for size, cost, and system performance.
• Develop symbols and CAD library databases using Cadence APD design tools
• Develop methodologies to improve layout productivity
• What we need to see

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