Senior Mask Design Engineer - Hardware

Responsibilities

• Performing physical layout for mixed-signal functions like top level, high speed datapaths and high-speed clocking designs in state-of-the-art sub-micron CMOS technologies using Cadence tools.
• You'll work closely with mixed-signal design engineers to customize designs for integration in VLSI products.
• Take part in floor planning, custom layout and verifying against design rules and schematics.
• What we need to see
• Have a BSEE or equivalent experience.
• Minimum of 8+ years industry experience in Mask and Layout
• Working independently on creating layout with excellent quality
• Deep understanding and previous experience for FinFET technology is a must
• You are an authority with Cadence custom circuit design tools - particularly virtuoso.
• Able to handle fast-paced project and iterate quickly based on designer’s feedback

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