Senior ASIC Design Engineer - DFT

Responsibilities

• As a key member of our DFX Methodology Team, you will play a critical role in shaping the architecture, design, implementation, and verification of DFT IPs for our next-generation SoC products. You’ll help drive innovation across the full silicon lifecycle—from pre-silicon to post-silicon—while mentoring and…
• Own the architecture and design of fuse controller and other DFT IPs for cutting-edge SoC designs
• Develop, deploy, and enhance DFT methodologies for scalability and future product needs
• Define and align feature sets by working closely with architects, platform, and software teams
• Partner with design, verification, synthesis, timing, and backend teams to ensure cohesive integration
• Create and execute test plans to support both functional and DFT full-chip verification
• Support post-silicon bring-up and validation efforts including debug and issue resolution
• Mentor junior engineers on test design strategies and trade-offs related to cost, quality, and performance
• What we need to see
• BS/MS Electrical or Computer Engineering (or equivalent experience) in related domain with proven DFT experience

Languages