Senior Chip Architect, Next Gen Networking

Responsibilities

• Define the end-to-end architecture and full feature set of next-generation NVL and Ethernet switch chips across all stages of the product lifecycle — from early concept to deployment.
• Develop architectural specifications and design guidelines, and drive trade-off analyses across multiple architecture options.
• Lead research and exploration of future architectures, including innovation that contributes to patent development.
• Collaborate closely with cross-functional teams — including other architecture groups, logic design, firmware, system software, and research — to ensure successful execution and integration.
• Act as a technical leader and subject matter expert, mentoring others and driving architectural excellence across the organization.
• ​What We Need to See
• BSc or MSc in Electrical Engineering, Computer Engineering, or related field
• 7+ years of proven experience in chip architecture, digital design, or design verification
• Solid understanding of digital ASIC design and strong familiarity with the full chip development cycle
• System-level thinking — ability to reason across hardware/software boundaries and understand how switch architecture impacts end-to-end performance

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