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Senior DFT Engineer - Post Silicon
NVIDIA
US, CA, Santa Clara +1 more · On-site · relocation$14,000–25,875 gross/mofull-timeNVIDIA Careers (offices abroad)
As a Senior DFT Engineer - Post-Silicon , you will take pioneering DFT capabilities beyond implementation—connecting silicon behavior, test data, and product learning to deliver robust, production-ready DFT solutions for NVIDIA’s most advanced chips. NVIDIA has continuously reinvented itself over two decades.
Responsibilities
- Drive post-silicon enablement of DFT capabilities from initial silicon bring-up through production ramp and lifecycle support.
- Develop data-driven approaches to analyze test results, quality indicators, yield behavior, and test efficiency; translate findings into practical technical recommendations.
- Influence DFT architecture and implementation by communicating post-silicon requirements early with clear metrics/what-if analysis.
- Define and improve methodologies for silicon bring-up, failure analysis, test-content validation, and production deployment.
- Help productize new DFT capabilities by establishing scalable flows, validation criteria, debug procedures, and documentation.
- Contribute to modeling and analysis that supports test-time optimization, quality improvement, yield learning, test power.
- Partner across design, product development, and test teams to align pre-silicon trade-offs with post-silicon execution.
- What We Need To See
- BSEE (or equivalent experience) with 8+ years or MS with 6 years of experience in related field.
- Solid understanding of DFT concepts, silicon test, and the relationship between design implementation, test content, and post-silicon behavior.
Languages
- Work format
- On-site
- Seniority
- Senior
- Posted
- 22 Oct 2026
- Last verified
- In the last 5 days
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