Senior High-Speed IO Validation Engineer

Responsibilities

• Own HSIO validation of NVIDIA products end-to-end, including test plan development, automation, design-for-validation requirements, resource planning, coverage metrics, test execution, bug resolution, and release to production.
• Validate high-speed interfaces including PCIe, NVLink, C2C (Chip-to-Chip), Ethernet, USB, DP, HDMI, CXL etc. across the protocol, link, and physical layers.
• Bring up new hardware platforms and debug sophisticated board- and system-level issues, working closely with logic/circuit design, board design, simulation, diagnostics, firmware, and software teams across multiple time zones.
• Review board schematics, PCB layouts and BOM, provide development and component feedback, and ensure interoperability with connected devices in complex interconnect topologies.
• Drive signal integrity characterization, link tuning, and margin analysis to ensure specification compliance, and efficient workload performance.
• Define and drive HSIO functionality test coverage from link bring-up through stress and corner-case scenarios, including link training, error handling, power management, and interoperability across silicon and platform configurations.
• Develop test automation to scale validation coverage and improve efficiency.
• Provide engineering support to manufacturing during NPI and MP stage.
• What we need to see
• BS+ in EE/CE or equivalent experience.

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