High Speed IO Validation Engineer

Responsibilities

• Execute electrical validation for PCIe, Ethernet, USB3, and UFS interfaces for NVIDIA GPUs, CPUs, and SOCs, ensuring adherence to signal integrity standards.
• Engage with cross-functional engineering teams to facilitate the design and development process, leveraging your knowledge of firmware/driver interactions and circuit design.
• Analyze complex HSIO bugs by applying strong debugging techniques and collaborating with various teams for rapid resolution.
• Diagnose issues and validate high-speed interfaces using modern lab equipment, including DSOs and BERT, with expert-level proficiency.
• Develop and apply test/debug programs using scripting languages (such as Perl and Python) to perform stress and failure analysis on high-speed interfaces.
• Innovate methodologies that leverage AI-assisted workflows and data-driven analytics to enhance debugging efficiency and improve validation quality.
• What We Need to See
• BS or MS in Electronics Engineering (or equivalent experience) with at least 3 years of relevant experience.
• Deep high-speed/SERDES electrical validation and tuning experience, with strong SI and PI fundamentals — S-parameters, eye diagrams, channel margin, crosstalk, return loss, PDN noise, jitter decomposition — and validation experience across silicon and platform boundaries (CoWoS/interposer/substrate, board), translating…
• Expert-level proficiency in electrical validation of PCIe (or similar) protocols, hands-on with lab equipment (DSOs, BERT, protocol analyzers), and scripting skills (Perl, Python) for developing test/debug programs.

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