Senior Mixed Signal Design Engineer

Responsibilities

• Mixed-Signal/Analog circuit build for High Speed Memory I/O Interfaces
• Solve challenge of circuit development in deep submicron CMOS FinFET processes
• Take designs through productization and be involved in all stages of development
• Work with multi-functional teams to optimize the designs
• What we need to see
• BSEE or MSEE or equivalent experience as well as 8+ years of well-rounded high Speed memory (LPDDR, DDR, GDDR, HBM) or SerDes related design experience.
• System level timing budgets, specs and analysis
• In-depth understanding of deep submicron CMOS FinFET process and circuit design issues
• Familiarity with device reliability, ESD and Latch-Up requirements
• Lead layout development and understand all ESD/Latch-Up, reliability rules

Languages