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PhD Research Intern, AI Accelerator Design and VLSI - 2027

NVIDIA

US, CA, Santa Clara · On-site · relocationSalary not disclosedfull-timeNVIDIA Careers (offices abroad)

NVIDIA Research is seeking PhD-level students to work as research interns at the intersection of AI HW/SW Co-Design, Hardware Accelerator Architecture, IC Design Methodology, and VLSI Design. Ideal candidates will have a broad perspective across areas including machine learning fundamentals, quantization and numerical methods for machine learning model optimization, digital VLSI circuits for computer arithmetic, high-productivity VLSI design and verification methodologies including applications of agentic AI to hardware design, AI hardware micro-architecture, and VLSI methodology and…

Responsibilities

  • Contribute to novel research advancing the state-of-the-art in the design of accelerators for AI and other high-impact workloads.
  • Research creative and innovative ASIC and VLSI design techniques and/or novel digital VLSI circuits. Apply machine learning, agentic AI, and state-of-the-art tools and methodologies to automated ASIC and VLSI design tool flows.
  • AI HW/SW Co-Design
  • Research and develop creative and innovative numerical methods for quantization, sparsity, or tensor decomposition grounded in computer arithmetic fundamentals and digital VLSI circuits.
  • Collaborate on the development of research prototype testchips.
  • Collaborate with AI researchers and hardware team members in research and product teams.
  • Plan to publish and present your original research.
  • What We Need To See
  • Pursuing a PhD in Electrical Engineering, Computer Engineering, Computer Science, or related field.
  • Publication records in leading ML, architecture, VLSI, or circuits conferences.

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    Work format
    On-site
    Seniority
    Intern
    Posted
    12 Oct 2026
    Last verified
    In the last 5 days

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