Coherency Verification Engineer

Responsibilities

• Verify complex digital designs at RTL level according to architecture and design specifications.
• Develop and maintain verification environments using SystemVerilog and UVM.
• Create, execute, and debug test plans for block-level, subsystem-level, and top-level verification.
• Work on the verification of coherent systems, including cache-related functionality and interconnect behavior.
• Validate designs involving CHI protocol, cache structures, coherency mechanisms, and system-level interactions.
• Run and manage simulations, regressions, and debug failures using industry-standard verification tools.
• Apply both formal and dynamic verification methodologies to identify design issues early.
• Use scripting languages such as Python, Perl, Bash, or TCL to automate verification flows and regression processes.
• Collaborate closely with architecture, design, and verification teams to analyze specifications, clarify requirements, and resolve issues.
• Track, document, and communicate verification progress, bugs, coverage status, and technical risks.

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