Physical Design Backend STA Engineer

Responsibilities

• Perform advanced Static Timing Analysis (STA) at a chiplet and FC level.
• Running Prime Time, review and debug timing paths, understand constraints, sdc generation, timing ecos generation.
• Identify convergence risks and work closely with physical design, RTL and DFT teams, ensuring convergence throughout various project stages.
• Responsible for a full timing closer and quality approval from pre-layout STA model through signoff.
• What we need to see
• B.Sc. in Electrical Engineering or Computer Engineering.
• 2-3 years of experience as an STA engineer.
• Strong ability to quickly adapt to new technology and delve deeply into new areas.
• Excellent communication skills and a proven ability to work effectively in a team environment.
• Demonstrated drive to develop and implement new solutions.

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