Senior ASIC Design Verification Engineer - LPU

Responsibilities

• As a key member of our ASIC Verification team, you will verify the design and implementation of inference accelerator
• You will be responsible for verification of the ASIC design, architecture, reference models and micro-architecture using advanced verification methodologies
• Understand the design and implementation of your unit, define the verification scope, develop the verification infrastructure and verify the correctness of the design
• Collaborate with architects, designers, and pre and post silicon verification teams to accomplish your tasks
• Implement and optimize automated verification flows to improve productivity and efficiency
• Stay updated on the latest trends and advancements in ASIC design verification and incorporate innovative techniques into the verification process
• What we need to see
• Bachelors Degree in EE, CS or CE (or equivalent experience) and 8+ years of relevant industry experience
• Background with building block and SoC level testbench utilizing strong debugging and analytical skills
• Experience in verification using random stimulus along with functional coverage, assertion-based verification methodologies and tools

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