Senior ASIC Design Engineer

Responsibilities

• You will document, implement, and deliver fully verified, high performance, area and power efficient RTL to achieve the design targets and specifications.
• Your responsibilities will include architecture and micro-architecture design, RTL design and synthesis, and logic and timing verification using pioneering CAD tools and semiconductor process technologies.
• In addition to the design role, you will participate in the verification of the design using sophisticated verification methodologies. You are expected to help define the verification scope and support the development of verification infrastructure.
• You will collaborate with several ASIC development teams and will need to communicate and coordinate with members of those teams, some of whom are in remote locations.
• What we need to see
• A Bachelors or Masters Degree (or equivalent experience)
• 5+ years of relevant / meaningful work experience
• Proven hardware engineering background with a concentration in VLSI and Computer Architecture
• Expertise in Verilog, System Verilog or similar HDL. Proficient programming in Perl/Python (or similar scripting languages).
• Experience with logic synthesis and timing analysis. Additional experience working on embedded processors is a plus.

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