Senior Physical Design Engineer

Responsibilities

• Responsible for all aspects of physical design and implementation of GPU and other ASICs targeted at the desktop, laptop, workstation, and mobile markets.
• As a member of a team, we will all participate in establishing physical design methodologies, flow automation, chip floorplan, power/clock distribution, chip assembly and P&R, timing closure.
• Craft designs for static timing analysis, power and noise analysis and back-end verification.
• What we need to see
• BSEE (MSEE preferred) or equivalent experience.
• 8+ years of experience in large VLSI physical design implementation on 5nm, 4nm and 3nm technology.
• Your successful track record of delivering designs to production is a requirement.
• Shown experience in the following areas: Power, Performance and Area improvement Initiatives is a plus.
• Already a validated strong power user of P&R, Timing analysis, Physical Verification and IR Drop Analysis CAD tools from Synopsys (ICC2/DC/PT/STAR-RC/ICV),Cadence (Innovus, Tempus, SeaHawk ) and Mentor Graphics.
• Deep understanding of custom macro blocks such as RAMs, CAMs, high-speed IO drivers, PLLs.

Languages