Senior Physical Design Engineer

Responsibilities

• In this position, you will expected to be part of the physical design methodology team supporting top level timing closure flows. PD activities includes floorplanning, Placement, CTS, Postroute Optimization, STA, EMIR drop, IO Timing, ECO & DRC closure.
• Work in collaboration with design team for addressing design challenges. Help team members in debugging tool/flow/design related issues. Constantly look for improvement in top level timing optimization and closure flows to improve TAT. Troubleshoots a wide variety up to and including difficult design issues and…
• Build flows based on industry standard and custom EDA tools to implement designs efficiently and improve PPA.
• Support flows for chip design teams across tapeouts and tech nodes.
• Work closely with EDA vendors to improve toolchains to fix bugs and implement innovative ideas
• What we need to see
• BE/BTECH/MTECH, or equivalent experience. 4+ years of experience in Physical
• Design, preferably with methodology/flow experience.
• Working experience with tools like ICC2/Innovus, Aspen, PrimeClosure, Tempus, Seahawk etc used in the RTL2GDSIl implementation.
• Strong algorithmic thinking with good automation skills in Python, TCL, tool specific scripting on one of the industry leading Place & Route tools.

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