Senior Verification Engineer, Switch SoC

Responsibilities

• You are encouraged to understand all features of a given project and define project milestones based on internal roadmaps, assign them and track them through agile framework
• Define and develop system-level methodologies, tools, and IPs to build SOCs in an efficient and scalable manner.
• Work on SOC Assembly and drive cross-functional teams towards SOC milestone execution.
• Be responsible for integrating all the pieces for a given defined project milestone and deliver the model to relevant teams for further verification at cluster/sub-system/SOC/emulation levels.
• Have good grasp of Perl, Python, or other industry-standard scripting languages.
• What we need to see
• BS (or equivalent experience) / MS with 4+ years of practical semiconductor design and architecture experience building complex SoC’s.
• Must have firsthand experience & solid understanding of all phases of SOC development in multiple ASIC projects including ASIC architecture, Micro-Architecture, RTL design, verification, timing closure & Physical design.
• Exposure to design and verification tools (Verilog/SV or equivalent, Cadence or equivalent simulation tools, debug tools like Indago, GDB etc.).
• C/C++ programming or python or any other industry-standard scripting language experience desirable.

Languages