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EDA Workflow Optimization Engineer

NVIDIA

US, CA, Santa Clara +3 more · On-site · relocation$12,667–23,958 gross/mofull-timeNVIDIA Careers (offices abroad)

NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It’s a unique legacy of innovation that’s fueled by great technology—and amazing people.

Responsibilities

  • Work in a diverse team performing fast paced investigations to empower our engineers to develop at the speed of light.
  • Participate in the full life-cycle of tool development, test, and deployment.
  • Work closely with other team members and chip engineers to understand and optimize how workflows use the compute and storage environments.
  • Build metrics that are reliable and easy to use by hundreds of engineers around the world.
  • Continuously improve our chip development process.
  • Directly contribute to the overall quality and time to market for our next generation chips.
  • What we need to see
  • Strong experience investigating and debugging complex, multi-discipline problems in a UNIX engineering environment.
  • Hands-on experience with architectural decisions in technologies (storage, networking, compute) our chip engineers depend on.
  • Experience with ASIC, VLSI, CAD/EDA or mixed signal design workflow environments.

Languages

    Work format
    On-site
    Seniority
    Mid
    Posted
    22 Oct 2026
    Last verified
    In the last 5 days

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